01 PATH ANALYSIS / LOCAL PARSER

Timing Studio

Report를 숫자 묶음으로 읽지 마세요. Path budget, delay driver, clock margin으로 분해합니다.

INPUT: Generic / OpenSTA text
OUTPUT: Path · budget · JSON
MODE: Browser local only

INPUT / REPORT TEXTGeneric timing path

LOCAL

Timing report

Startpoint: u_cpu/reg_q[17] (rising edge-triggered flip-flop clocked by core_clk)
Endpoint: u_lsu/reg_d[4] (rising edge-triggered flip-flop clocked by core_clk)
Path Group: core_clk
Path Type: max

Point                                      Incr       Path
-----------------------------------------------------------
clock core_clk (rise edge)                 0.000      0.000
clock network delay (propagated)           0.114      0.114
u_cpu/reg_q[17]/Q (DFF_X2)                 0.071      0.185
u_alu/U42/Z (AOI21_X1)                     0.126      0.311
net_n388 (net)                             0.087      0.398
u_lsu/U18/Z (NAND2_X2)                     0.142      0.540
net_n412 (net)                             0.096      0.636
u_lsu/reg_d[4]/D (DFF_X1)                  0.019      0.655
data arrival time                                     0.655

clock core_clk (rise edge)                 0.800      0.800
clock uncertainty                         -0.045      0.755
library setup time                        -0.068      0.687
data required time                                    0.687
-----------------------------------------------------------
data required time                                    0.687
data arrival time                                    -0.655
-----------------------------------------------------------
slack (MET)                                           0.032

텍스트는 전송·저장되지 않습니다. Point / Incr / Path 열이 있으면 delay waterfall도 만듭니다.

ANALYSIS / core_clkMAX PATH

STARTPOINTu_cpu/reg_q[17]

ENDPOINTu_lsu/reg_d[4]

ARRIVAL0.655 nsparsed data path

REQUIRED0.687 nscurrent budget

PROJECTED SLACK+0.032 nsMET

01 / PATH WATERFALL

Incremental delay

CELLNETCLOCK

01clock network delay (propagated)

114 ps

02u_cpu/reg_q[17]/Q (DFF_X2)

71 ps

03u_alu/U42/Z (AOI21_X1)

126 ps

04net_n388 (net)

87 ps

05u_lsu/U18/Z (NAND2_X2)

142 ps

06net_n412 (net)

96 ps

07u_lsu/reg_d[4]/D (DFF_X1)

19 ps

02 / WHAT-IF

Clock margin sensitivity

slack = period - uncertainty - setup - arrival

Clock period0.800 nsFmax proxy 1.250 GHzClock uncertainty0.045 nsParsed baseline 0.045 ns

arrival

setup

uncertainty

03 / REVIEW QUEUE

Check these first

01
u_lsu/U18/Z (NAND2_X2)
142 ps · CELL · path의 21.7%
02
u_alu/U42/Z (AOI21_X1)
126 ps · CELL · path의 19.2%
03
clock network delay (propagated)
114 ps · CLOCK · path의 17.4%

이 순위는 incremental delay 정렬입니다. Slew, load, fanout, transition, SI, OCV/POCV, derate, path exception까지 포함한 실제 원인 분석은 원본 tool과 library context에서 검토하세요.