VLSI Korea

VLSI DESIGN LAB · INTERACTIVE 02

Floorplan Sprint 01

Rearrange six macros to shorten wires and reduce congestion.
Explore physical-design trade-offs directly.

720 × 480 CORE12U SNAPLOCAL ONLY

CHALLENGE / FP-01

Macro placement core

PORTABLE EXPERIMENT · V1.vlsilab.jsonLOCAL FILE · NO UPLOAD
Recent

Carries six snapped macro coordinates and the current selection; metrics are recomputed locally.

SELECTEDCPU TILEX 036 · Y 048

keys or drag · 12-unit snap

CPU TILE selected. Drag it or use the arrow keys.

WHAT YOU ARE TUNING

A good placement is not one number.

  1. 01

    Make it legal

    Keep every macro inside the core and remove all red overlap regions.

  2. 02

    Pull nets close

    Bring connected blocks together to reduce half-perimeter wirelength.

  3. 03

    Leave routing room

    Distribute red congestion cells so connections do not pile into one corridor.

This exercise uses only a synthetic educational netlist. It contains no employer, customer, product, NDA, or proprietary design data and is not a sign-off result.